1. Field of the Invention
The present invention relates to capacitive memory cells for the storage of binary information. More particularly, the subject disclosure relates to two-device memory cells using a single storage capacitor which cells may be utilized in memory arrays such as those typically employed in integrated circuit memory arrays.
2. Description of the Prior Art
One of the difficulties with the one-device cell, such as the one-device cell described in U.S. Pat. No. 3,387,286 resides in the fact that such a cell uses a common storage electrode (usually polysilicon) which covers a large area of the chip, most of which area is over a thin oxide. As a result of such a structural arrangement, any pin hole defect in the oxide will readily cause a short between the common storage electrode or plate and the other electrode of the storage capacitor of such a cell. The probability of a defect is relatively high considering the rather large area involved. As is evident, such a short will have serious consequences, thereby lowering yield.
A further difficulty with the one-device cell resides in the fact that when a word line is interrogated, the resulting AC current flow in the highly resistive storage electrode plate will cause a potential bounce. Such a potential bounce may have a deleterious effect on neighboring cells. In addition, the single-device memory cell suffers from susceptibility to noise, restrictive tolerance requirements, leakage current, and the like.
Two-device memory cells obviating some of the difficulties of the one-device cell have heretofore been known in the art. For example, Barsuhn et al describe a two-device memory cell arrangement in IBM Technical Disclosure Bulletin, Vol. 18, No. 3, August 1975 at pp. 786 and 787. One advantage to the two-device memory cell resides in the fact that it exhibits a high degree of symmetry thereby providing differential sensing, excellent common mode noise rejection and relatively liberal tolerance requirements.
Although the two-device cell does overcome some of the disadvantages to the single-device cell, the two-device cell still exhibits shortcomings in its performance. For example, the two-device cell utilizes two capacitors having a common connection referenced to ground. As a result, each capacitor has its own charging/discharging path whereby differences between these two paths, such as differences in leakage current, are not compensated for. A further disadvantage to the two-device cell utilizing two capacitors resides in the fact that it exhibits a relatively low sense signal.